> posted a video that got a few million views<p>Anybody got a link to that?<p>Is it this?<p><a href="https://www.instagram.com/armaan.gomes/reel/DatqWKChtnw/?hl=en" rel="nofollow">https://www.instagram.com/armaan.gomes/reel/DatqWKChtnw/?hl=...</a><p>I was expecting a real video, not some 9 second clip posted to random social media website.
Cool, I thought this was a CPU custom designed for Doom, but I guess that's just a 486 :)<p>edit: I went to down a quick hole "The historical footnote is that a version of this genuinely happened. SNES Doom shipped with a Super FX 2 in the cartridge, a custom RISC chip with a pixel-plot instruction, because the console's own CPU had no chance. Jaguar and PlayStation ports both moved the rasteriser onto dedicated hardware. Doom's design was shaped by the absence of an FPU, and then hardware kept getting built to catch up with it."
> SNES Doom shipped with a Super FX 2 in the cartridge, a custom RISC chip with a pixel-plot instruction, because the console's own CPU had no chance.<p>The Super FX is a custom RISC chip, but it was custom made for Star Fox and used for other projects with refinements.
> but I guess that's just a 486<p>*just* a 486. :-(
This is just RV32I-ZMMUL not a custom architecture, bt if you do want to see something from scratch, without any premade ISA or anything, here is an NPU I built: <a href="https://www.armaangomes.com/blogs/kernn/" rel="nofollow">https://www.armaangomes.com/blogs/kernn/</a>
Great work!<p>This reminded me of a project I built a while back: a RV32IM emulator in C++ that can boot and run DOOM. Initially I implemented only RV32I, and implementing the M extension provided a massive speedup!<p>If anyone's curious, here's the source code: <a href="https://github.com/lalitshankarch/rvcore" rel="nofollow">https://github.com/lalitshankarch/rvcore</a>
Reading "Custom CPU" I expected wafer.space, instead of FPGA.
<a href="https://www.linkedin.com/posts/hirosh-dabui-a5367443_linux-running-on-my-risc-v-asic-first-silicon-ugcPost-7484586796769669120-8JYm/" rel="nofollow">https://www.linkedin.com/posts/hirosh-dabui-a5367443_linux-r...</a>
We hope to tape it out, along with an NPU and GPU once we raise $10k. Though first we have to find $10k :(
Very cool!<p>I just did the same thing, but for a byte-code interpreter for a completely novel ISA I made up a while back (with an assist from Claude). I just haven't made the HN post yet, since I'm doing a bit of cleanup.<p><a href="https://github.com/paulmooreparks/Maize/" rel="nofollow">https://github.com/paulmooreparks/Maize/</a>
<a href="https://paulmooreparks.github.io/Maize/" rel="nofollow">https://paulmooreparks.github.io/Maize/</a>
I wonder, if Doom didn’t exist, what would have taken its place for the “can it run X” usage.
For anyone else curious: custom FPGA-based CPU code but not a custom architecture. This is an RV32I core. The article takes along time to give up this fact.
Deciding on an ISA like RV32I only sets constraints on your architecture, it doesn't give you any of it for free. So I think it's entirely valid to say that it's a custom architecture if they didn't use any pre-existing CPU design.<p>Basically, they had the API interface and implemented everything behind it. I think saying that "it's an RV32I core" vastly underrates the design work that goes into actually implementing an RV32I core from scratch.
Making a particularly good core is hard. Making <i>a</i> core to the minimum risc-v spec is what you do in a single college course. It's what the ISA was designed for.
It's a custom implementation of an existing architecture
It's common to call the instruction set just "architecture", or ISA (instruction set architecture) to be more precise. The implementation is commonly called "microarchitecture".
RV32I doesn't define any architecture, it's just an ISA i.e. a software contract that happens to be implementable in hardware. The CPU could run on outer space goop and still be RV32I.
The *architecture* is RV32I_Zmmul which is unambiguously neither new nor custom.<p>What you describe (the specific implementation details of a core) is *microarchitecture*. In this case clearly a lot of work was done and it <i>is</i> cool, but the *architecture* is indeed RV32I and not custom<p>I was not undermining anything. I was helping others find the info I sought and took a while to find. This is why i left my comment. Everyone has their own interests. As an example, my thoughts were "whoa... a new architecture... did they write a new compiler or rewrite doom in assembly?" and for that "it is rv32i" would have been a quick answer.
thanks for saving me the time but it is pretty cool to see i'd love to learn more about fpga my goal is to run very old rare consoles
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Well, Doom runs everywhere.
why Zmmul and not full M — is it just fpga area, or did the doom port let you drop div/rem?
I'm kinda lazy lol. We are also implementing out-of-order rn, so we want to get a really solid rv32i setup going before adding multiplication, floating point, vector, etc.
Always a delight seeing Chisel in the wild :)
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