Cute but wouldn't work with ssize_t :)<p>VHDL's array/vector syntax actually works a similar way:<p>-- gives 0, 1, 2, 3:<p>for i in 0 to 3 loop<p>-- gives 3, 2, 1, 0:<p>for i in 3 downto 0 loop<p>-- Source - <a href="https://stackoverflow.com/a/7642026" rel="nofollow">https://stackoverflow.com/a/7642026</a>
-- Posted by Kerrek SB
-- Retrieved 2026-10-29, License - CC BY-SA 3.0